The present invention relates to a method of manufacturing a semiconductor device and, particularly, to a method of manufacturing a polysilicon film suitable for use as a capacitor electrode.
With the recent increase of integration density of a DRAM, a cell size and an area to be occupied by a capacitor of the DRAM cell tend to reduce, respectively. In order to keep a capacitance of such capacitor at an acceptable value, a stacked capacitor or a trench stacked capacitor has been used since it can provide a large capacitor area therein, has a anti-alpha ray characteristics and is capable of reducing interference between DRAM cells. For a DRAM of 64 Mbits, a cell area is estimated as 2 .mu.m.sup.2 or less. When such capacitor as mentioned above is incorporated in such DRAM, a silicon oxide film as thin as 50 .ANG. is required as a dielectric film of the capacitor. It is very difficult to form such thin silicon oxide film on a whole chip uniformly without defects. Therefore, it has been proposed to increase the above-mentioned area of the capacitor portion while keeping a thickness of the capacitor insulating film as it is.
Watanabe et al. discloses in U.S. patent application Ser. No. 07/672,073 (assigned to the assignee of this application) that, by lowering temperature in forming a polysilicon film by LPCVD from 600.degree. C. which has been used conventionally to about 550.degree. C., dense crystal grains each having hemisphere shape grow on a surface of a substrate in a boundary region thereof in which amorphous silicon is transferred to polysilicon, resulting in a surface area of the polysilicon film twice that grown at 600.degree. C. In Watanabe et al., a sufficient capacitance value and low leak current value are obtained with a silicon oxide film 100 .ANG. thick by applying such polysilicon film to a charge storage electrode of a stacked capacitor. However, according to the method of Watanabe et al., temperature at which such hemisphere crystal grains grow on the surface is limited to a very narrow range from 545.degree. C. to 555.degree. C. Therefore, it is very difficult to control growing temperature within such small range as 10.degree. C. for mass production. Further, when, in order to isolate between adjacent capacitors, dry-etching is performed after such polysilicon film formation, a side wall portion of the storage electrode is flattened by etching, raising a problem in realizing a large capacitance value. As another prior art, Tatsumi discloses in Japanese Patent Application No. 2-249154 (filed on Sep. 19, 1990 and assigned to the assignee of this application) that a polysilicon film containing hemisphere or mushroom shaped crystal grains is obtained by forming an amorphous silicon film and heating it in vacuum condition. A sufficient capacitance value and low leak current value are obtained with a silicon oxide film 100 .ANG. thick by applying such polysilicon film to an electrode of a stacked capacitor. Further, Sakai discloses in Japanese Patent Application No. 3-067657 (filed on Mar. 8, 1991 and assigned to the assignee of this application) and in Japanese Patent Application No. 3-073693 (filed on Mar. 14, 1991 and assigned to the assignee of this application) that a polysilicon film containing hemisphere or mushroom shaped crystal grains is grown epitaxially in solid phase by heating a wafer in high vacuum condition immediately after a natural oxide film formed on a surface of an amorphous silicon film on the wafer due to atmospheric oxidation is removed by using fluoric acid solution or by ion sputtering.
That is, crystal nucleation is performed on a surface of an amorphous silicon film and nuclei thus produced grown when it is heated at a constant temperature in a range from 550.degree. C. to 700.degree. C. Since surface diffusion rate of silicon on a clean amorphous silicon film surface is very high compared with growing rate of slid phase epitaxy, silicon is concentrated to the nuclei by surface diffusion and thus mushroom shaped crystal grains are obtained. An upper limit of grain size is determined at a time when grains grow to the extent that adjacent grains become in contact with each other. Thus, an average grain size depends upon density of crystal nuclei produced by nucleation in a unit time, that is, nucleation rate. In other words, the average grain size is determined by a substrate temperature in an initial stage of substrate heating. The higher the substrate temperature results in the higher the nucleation rate and thus the smaller the average grain size. However, since activation energy of crystal nucleation of amorphous silicon film is larger than activation energy of surface diffusion of silicon atoms, crystal may grow rapidly before crystal nuclei density becomes enough even if the substrate temperature is increased for the purpose of reducing average grain size. Therefore, it is difficult to obtain a polysilicon film having small enough grain size. Further, variation of grain size is also increased. In addition, since atom migration becomes large with increase of temperature, grain shape becomes relatively smooth and flat compared with hemisphere shape.
As an example, it is possible to obtain a polysilicon film having average grain size of about 1500 .ANG. at substrate temperature of 650.degree. C. When a capacitor electrode area is reduced to 2 .mu.m.sup.2, the number of crystal grains formed on the capacitor electrode may vary. A capacitance value is twice at most compared with that with flat electrode surface and about 1.5 times in average.
As described, since, according to the conventional technique, the generation and growth of crystal nuclei are performed at a constant temperature, it is very difficult to form a polysilicon film having small enough grain size and large enough surface area with acceptable reproducibility.